Exploring a MIPS CPU that isn't RISC and even uses variable length instructions: https://www.eejournal.com/article/mips-i7200-breaks-the-chain/
(In embedded markets it's a lot easier to sell a new ISA apparently!)
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I've written difftastic packaging instructions: https://difftastic.wilfred.me.uk/packaging_difftastic.html
The different distros have taken different approaches, so I'm trying to help with common gotchas — don't forget the man page!
Feedback welcome, especially if you've ever packaged something 🙂
Computing optimal 8501 instructions for rotations using an SMT solver and Racket with Rosette:
A decent part of VMs being faster than AST interpreters is just memory layout AIUI.
VM instructions are largely flat arrays, so there's less pointer chasing.