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Mar 27, 2019 at 00:59
MIPS is going to be open source, competing with RISC-V! https://www.eetimes.com/document.asp?doc_id=1334087 https://www.eetimes.com/document.asp?doc_id=1334317

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May 3, 2018 at 18:35
Exploring a MIPS CPU that isn't RISC and even uses variable length instructions: https://www.eejournal.com/article/mips-i7200-breaks-the-chain/ (In embedded markets it's a lot easier to sell a new ISA apparently!)